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X488: Semiconductor Devices for IC Design


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Type of Credit Academic Credit
Campus Department EECS
Level Upper Division
Number of Units 2
Level of Difficulty Level 3 (Intermediate)
Instructor Dr. Vincent Chang
Number of Lectures 22
Course Length 30 hours

Course Fee

US$ 750.00
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Course Description
The ever-increasing-bandwidth state-of-the-art IC design requires a comprehensive in-depth understanding of not only basic characteristics of semiconductor devices but also their second-order effects and device modeling. This course is intended for working professionals who have no experience on IC design yet are interested in building an in-depth understanding of semiconductor devices and their modeling for advancing career development in the integrated-circuit design. A broad range of topics in BJT and MOS is covered, with an emphasis on delivering an inspiring and practical perspective involving physical concepts, operation principles, second-order effects, and modeling and simulation. The project options cover nanoelectronics—transistor scaling & future trends, recent breakthrough and real world issues in CMOS nanotechnology ranging from 90nm down to 22nm, CMOS device design and performance parameters, and future trends in the statistical IC design in nanoelectronics.


Free Course Preview
Lecture Topic Soundtrack # of Slides
  Course Preview_X138: Semiconductor Devices for Integrated Circuit Design   English / Mandarin 17 
Course Overview (SLIDE SHOW Only)  English / Mandarin 29 


Class Presentation
Lecture Topic # of Slides
Course Overview  29 
Key Concepts of BJT Device Physics  55 
Designing the Current Gain of Bipolar Transistors  33 
Minority Carrier Concentrations Under Forward-Active  57 
Advanced Derivation of Forward-Active Current Gains  64 
Current-Voltage Characteristics of Bipolar Transistors  46 
Secondary Effects of the Actual Bipolar Transistor  64 
Low-Frequency Modeling of Bipolar Transistors  49 
Key Concepts of Small-Signal Input Resistances  62 
10  Key Concepts of Small-Signal Output Resistance  85 
11  High Frequency Modeling of Bipolar Transistors  91 
12  Key Concepts of MOS Device Physics  132 
13  Current-Voltage Characteristics of MOSFET  68 
14  P-Channel Enhancement MOSFET   69 
15  Secondary Effects of the Actual MOS Transistor  57 
16  Adjusting Threshold Voltage vs. Depletion MOSFET   28 
17  SPICE Simulation Examples  56 
18  Low-Frequency Modeling of MOS Transistors  75 
19  Key Concepts of MOS Body Transconductance  25 
20  High Frequency Modeling of MOS Transistors  43 
21  Advanced MOS SPICE Modeling Parameters--Part I  61 
22  Advanced MOS SPICE Modeling Parameters--Part II  59 


*Number of slides are estimated


Additional Course Information
Who Should Attend

Many types of working professionals find this course well-structured, challenging, and easy to understand:

• Majored in EE but need to brush up on their knowledge in this area for advancing their careers.
• Wish to enter the semiconductor market and are looking to acquire essential knowledge and build a solid foundation in this area.

Course Syllabus

Course Prerequisite

"X32: Intro to Physics of Semiconductor Devices” or working-level knowledge on basic solid-state electronics is expected.

Grade Structure

Your grade consists of the following elements:

• Progress Update & Discussion: 20%
• Homework: 10%
• Midterm Exam: 20%
• Proctored Final Exam: 25%
• Research Project: 25%

Project Options

As a registered participant, you will be expected to leverage what they learn from this course to conduct an individual research project which scope covers some real-world issues with the following research options:

• Nanoelectronics—transistor scaling & future trends
• Recent breakthrough in advanced CMOS technologies
• Advanced CMOS modeling in the nanotechnology ranging from 90nm down to 22nm
• CMOS device design and performance factors
• Statistical design in nanoelectronics

Selected topics for recent breakthrough in advanced CMOS technologies:

• Intel’s 45nm logic technology with high-k+metal gate transistors
• TSMC’s 32nm CMOS low power SoC platform for foundry applications
• IBM’s record performance of 45nm SOI CMOS technology

You should access more detailed information in the Classrooms after you register this course.


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